Sub micron placement accuracy - the era for heterogeneous integration and optoelectronic assemblies
Jonathan Abdilla, Mario Fraubaum, Martin Kainz, Zlatko Hajdarevic, Debbie Claire Sanchez, Chris Scanlan.
High-performance computing (HPC) architectures for artificial intelligence and data-centric workloads increasingly rely on heterogeneous integration to overcome limitations in device scaling, power efficiency, and system bandwidth.
Advanced packaging technologies must therefore support aggressive interconnect pitch reduction, stringent alignment tolerances, and high interconnect integrity across logic chiplets, high-bandwidth memory, and emerging co-packaged optical interfaces. Conventional solder-based interconnect approaches face fundamental challenges at fine pitch.
This extended abstract addresses the challenges of advanced packaging. We will tackle hybrid bonding challenges and solutions as well as latest bonding results. Thermocompression bonding will also be addressed due to its increased importance for sub 20µm interconnect technologies, which are demanding not only higher accuracies but also fluxless bonding solutions. We will also tackle the requirements seen in the optoelectronic market, particularly for the transceiver side.
